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专利名称：Apparatus and method for evaluating the
performance of a system in a control loop
发明人：Muhammad Kalimuddin Khan,Kenneth J.
Mulvaney,Michael Deeney,Niall KevinKearney
申请号：US14020404申请日：20130906公开号：US09594100B2公开日：20170314
专利附图：
摘要：A monitoring circuit for monitoring the performance of a phase locked loop
having a divider therein, the divider comprising at least a first counter, the monitoringcircuit comprising at least one memory element for capturing a value of the first counterafter a predetermined time from a system event in the operation of the phase lockedloop, a variability calculator for comparing a value of the counter with a preceding valueof the counter to calculate a variation, and a circuit responsive to the estimate of variationfor outputting a status signal.
申请人：ANALOG DEVICES GLOBAL
地址：Hamilton BM
国籍：BM
代理机构：Knobbe, Martens, Olson & Bear, LLP
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